All stock codes associated to this product
HX316LC10FBK2/8, 740617246452
DDR3L-1600 CL10 240-Pin DIMM Kit
DescriptionHyperX HX316LC10FBK2/8 is kit of two 512M x 64-bit (4GB) DDR3L-1600 CL10 SDRAM (Synchronous DRAM) 1Rx8, low voltage, memory modules, based on eight 512M x 8-bit DDR3 FBGA components. Total kit capacity is 8GB. Each module kit supports Intel® Extreme Memory Profiles (Intel® XMP) 2.0. This module has been tested to run at DDR3L-1600 at a low latency timing of 10-10-10 at 1.35V. Additional timing parame-ters are shown in the PnP Timing Parameters section below. The JEDEC standard electrical and mechanical specifications areas follows:
PnP JEDEC TIMING PARAMETERS:JEDEC/PnP:DDR3L-1600 CL10-10-10 @1.35V/1.5V DDR3L
-1333
CL9-9-9 @1.35V
/1.5V
DDR3L-1066
CL7-7-7 @1.35V
/1.5V
XMP Profile #1:DDR3L-1600 CL10-10-10 @1.35V
Features
JEDEC standard 1.35V and 1.5V Power Supply
VDDQ = 1.35V and 1.5V
800MHz fCK for 1600Mb/sec/pin
8 independent internal bank
Programmable CAS Latency: 11, 10, 9, 8, 7, 6
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
8-bit pre-fetch
Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
Bi-directional Differential Data Strobe
Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE = 95°C
Asynchronous Reset
Height 1.291” (32.80mm) w/heatsink, single sided Component
Specification
CL(IDD): 10 Cycles
Row Cycles time (tRCmin): 48.125ns (min.)
Refresh to Active/Refresh, Command Time (tRFCmin): 260ns (min.)
Row Active Time (tRASmin): 37.5ns (min.)
Maximum Operating Power: TBD W*
UL Rating: 94 V - 0
Operating Temperature: 0 C to 85 C
Storage Temperature: -55 C to +100 C
